VLSI Contributors

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VLSI
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Simulation flowBlock diagramsRTL, understanding/extending CrocSynthesisOverview of the flowFloorplanningPlacement / TimingUnderstanding clock treeRouting / FinishingPower analysisDRC / LVSTetramax / ATPGPreparing plots, Presenting results
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    Contributors to VLSI Design pages

    The VLSI pages have been compiled with the help of many people and this page tries to capture contributors alphabetically

  • Beat Muheim Bachl
  • Luca Benini
  • Thomas Benz
  • Frank K. Gürkaynak
  • Zerun Jiang
  • Philippe Sauter


The VLSI pages are part of the open source VLSI design course offered by the Integrated Systems Laboratory of ETH Zürich, by Luca Benini and Frank K. Gürkaynak. See full list of contributors.

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